ARCS 2017
30TH GI/ITG INTERNATIONAL CONFERENCE ON ARCHITECTURE OF COMPUTING SYSTEMS
THIS YEAR’S FOCUS: HETEROGENEOUS NODE ARCHITECTURES WITH DEEP MEMORY SYSTEMS
Vienna, Austria
April 03 – 06, 2017
http://arcs2017.itec.kit.edu/
CALL FOR PAPERS
Submission Deadline: October 28, 2016
The ARCS conferences series has over 30 years of tradition reporting leading
edge research in computer architecture and operating systems. The focus of the
2017 conference will be on Heterogeneous Node Architectures with Deep Memory
Systems.
ARCS 2017 will be organized by the Complang Group at the Vienna University of
Technology and the CAPP group at the Karlsruhe Institute of Technology (KIT).
The proceedings of ARCS 2017 will be published in the Springer Lecture Notes on
Computer Science (LNCS) series. After the conference, it is planned that authors
of selected papers will be invited to submit an extended version of their
contribution for publication in a special issue of the Journal of Systems
Architecture. Further, a best paper and best presentation award will be
presented at the conference.
Paper submission: Authors are invited to submit original, unpublished research
papers on one or more of the following topics:
– Multi-/many-core architectures, memory systems, and interconnect networks.
– Programming models, runtime systems, and middleware support for many-core
and/or heterogeneous computing platforms.
– Tool support for performance optimization, debugging, and verification.
– Generic and application-specific architectures such as reconfigurable systems
in hardware and software.
– Robust and fault-tolerant systems structures.
– Architectures and design methods/tools for real-time embedded systems.
– Cyber-physical systems and distributed computing architectures.
– Organic and autonomic computing including both theoretical and practical
results on self-organization, self-configuration, self-optimization,
self-healing, and self-protection techniques.
– Operating Systems, including but not limited to scheduling, memory management,
power management, and real-time OS (RTOS) concepts.
– Energy and power-aware computing, including green computing topics.
– System aspects of ubiquitous and pervasive computing such as sensor nodes,
novel input/output devices, novel computing platforms, architecture modeling,
and middleware.
– Architectures for robotics and automation systems.
– Applications of embedded and cyber-physical systems.
– High-performance and large scale parallel computing.
– Approximate computing.
– Post-Moore Architectures, including but not limited to quantum and
neuromorphic computing.
Submissions should be done through the link that is provided on the conference
website https://easychair.org/conferences/?conf=arcs2017. Papers must be
submitted in PDF format.
They should be formatted according to Springer LNCS style (see:
http://www.springer.de/comp/lncs/authors.html) and must not exceed 12 pages,
including references and figures.
Workshop and Tutorial Proposals: Proposals for workshops and tutorials within
the technical scope of the conference are solicited. Submissions should be done
through email directly to the corresponding chair: Carsten Trinitis
(Carsten.Trinitis@tum.de)
Important Dates:
Paper submission deadline: October 28, 2016
Workshop and tutorial proposals: November 30, 2016
Notification of acceptance: December 21, 2016
Camera-ready papers: January 11, 2017
Organizing Committee:
General Co-Chairs
Jens Knoop, Vienna University of Technology, Austria
Wolfgang Karl, Karlsruhe Institute of Technology, Germany
Program Co-Chairs
Martin Schulz, Lawrence Livermore National Laboratory, USA
Koji Inoue, Kyushu University, Japan
Workshop and Tutorial Co-Chairs
Carsten Trinitis, Technische Universität München, Germany
Publicity Chair
Miquel Pericàs, Chalmers University of Technology, Sweden
Publication Chair
Thilo Piontek, Magdeburg University, Germany
Local Organization
TBD
Program Committee (to be completed):
Michael Beigl, Karlsruhe Institute of Technology, Germany
Mladen Berekovic, TU Braunschweig, Germany
Jürgen Brehm, Leibniz University Hannover, Germany
Uwe Brinkschulte, University of Frankfurt/Main, Germany
João Cardoso, FEUP/University of Porto, Portugal
Laura Carrington, San Diego Supercomputing Center, USA
Albert Cohen, INRIA, France
Martin Daněk, TU Darmstadt, Germany
Ahmed El-Mahdy, Alexandria University, Egypt
Dietmar Fey, University of Erlangen-Nuremberg, Germany
William Fornaciari, Politecnico di Milano, Italy
Roberto Giorgi, University of Siena, Italy
Daniel Gracia-Pérez, Thales Research & Technology, France
Jan Haase, Universität Lübeck, Germany
Andreas Herkersdorf, TU München, Germany
Christian Hochberger, TU Darmstadt, Germany
Gert Jervan, Tallinn University of Technology, Estland
Jörg Keller, Fernuniversität Hagen, Germany
Andreas Koch, TU Darmstadt, Germany
Hana Kubátová, FIT CTU, Prague, Czech Republic
Olaf Landsiedel, Chalmers University of Technology, Sweden
Dong Li, UC Merced, USA
Erik Maehle, Universität zu Lübeck, Germany
Christian Müller-Schloer, Leibniz University Hannover, Germany
Luis Pinho, CISTER, ISEP, Portugal
Thilo Pionteck, Universität zu Lübeck, Germany
Pascal Sainrat, IRIT – Université de Toulouse, France
Luca Santinelli, Onera, France
Toshinori Sato, Fukuoka University, Japan
Wolfgang Schröder-Preikschat, FAU, Germany
Muhammad Shafique, Karlsruhe Institute of Technology, Germany
Cristina Silvano, Politecnico di Milano, Italy
Leonel Sousa, IST/INESC-ID, Portugal
Rainer G. Spallek, TU Dresden, Germany
Olaf Spinczyk, TU Dortmund, Germany
Benno Stabernack, Fraunhofer HHI, Germany
Walter Stechele, TU Munich, Germany
Jürgen Teich, University of Erlangen-Nuremberg, Germany
Sven Tomforde, University of Kassel, Germany
Carsten Trinitis, TU Munich, Germany
Hans Vandierendonck, Queen’s University Belfast, Great Britain
Stephane Vialle, SUPELEC, France
Lucian Vintan, “Lucian Blaga” University of Sibiu, Romania
Klaus Waldschmidt, University of Frankfurt, Germany
Stephan Wong, Delft University of Technology, The Netherlands
Sungjoo Yoo, Seoul National University, Korea