IEEE Transactions on Computers Special Section on Emerging Non-volatile Memory Technologies: from Devices to Architectures and Systems

Notification Due

Aug 31, 2018

Final Version Due

Sep 30, 2018

Submission Deadline

Feb 28, 2018

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CALL FOR PAPERS

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IEEE Transactions on Computers

Special Section on Emerging Non-volatile Memory Technologies:

from Devices to Architectures and Systems

Guest Editors

– Yuan-Hao Chang

Institute of Information Science

Academia Sinica

– Jingtong Hu

Department of Electrical and Computer Engineering

University of Pittsburgh

– Mehdi B. Tahoori

Institute of Computer Science & Engineering

Karlsruhe Institute of Technology

Topical Editor

– Ronald F. DeMara

Department of Electrical and Computer Engineering

University of Central Florida

Important Dates:

Submission deadline: February 28, 2018

First decision to authors: May 15, 2018

Revision due: July 15, 2018

Acceptance notification: August 31, 2018

Publication material due: September 30, 2018

Special Section publication: First half of 2019

Submission website: https://mc.manuscriptcentral.com/tc-cs

Call for Papers:

Emerging non-volatile memory (NVM) technologies (e.g., 3D NAND flash, STT-MRAM,

ReRAM, PCM, FeRAM) have attracted significant interest in recent years because

of the fast-growing performance and capacity demands on memory and storage in

the big data era. Well-known examples are the 3D XPoint memory (or Optane

storage devices), along with various NVDIMM hybrid memory and MRAM device

technologies. They have shown potential towards larger memory and storage

capacities with nearly zero leakage power, while extending memory/system

architecture design approaches. The unique characteristics of NVM technologies

not only introduce new opportunities, but simultaneously create challenges to

the designs at multiple levels of abstraction in computer systems, including

those of device management, memory/storage architecture, and system design.

Thus, for the emerging NVM technologies, there is an urgent need for technology

innovation, modeling, analysis, design, and application, ranging from

device-level to system-level.

In this special section, IEEE Transactions on Computers seeks original

manuscripts which explicitly advance the topics listed below. However, purely

theoretical papers will not be suitable for consideration in this special

section.

Memory/Storage Architecture:

– Non-volatile register/cache design

– Non-volatile processor design

– NVM memory architectures

– NVM memory/storage management

– NVM device management regarding the issues of reliability, power,

performance, etc.

– Unification of memory and storage via NVM

– Neuromorphic architectures and processing-in-memory using non-volatile

devices

– Hybrid NVM design, e.g., NVDIMM

System Design and Middleware:

– Compiler optimization for NVM

– System virtualization with NVM

– Non-volatile computing systems

– File system design for NVM

– NVM-based system modeling

– NVM-based system analysis

– NVM-aware algorithms (e.g., machining learning and neural network)

designs

– In-memory computing applications leveraging NVM

Submission:

The submitted papers must describe original research which is not published

nor currently under review by other journals or conferences. Extended

conference papers should contain at least 50% new content and should

include a list of changes and a copy of the previously published manuscript.

All submissions will be peer-reviewed for originality, significance,

technical soundness, practical contribution, and clarity. Authors are

invited to submit their manuscripts to IEEE Transactions on Computers

at https://mc.manuscriptcentral.com/tc-cs.

Please address all correspondence regarding this Special Section to the

Guest Editors at tcsinvm@iis.sinica.edu.tw.