The 36th IEEE Workshop on Signal Processing Systems

Event Dates

Nov 02, 2022 - Nov 04, 2022

Location

Rennes, France

Submission Deadline

Apr 15, 2022

IEEE SiPS 2022

The 36th IEEE Workshop on Signal Processing Systems

November 2-4, 2022, Rennes, France

Supported by IEEE CAS (Circuit and Systems Society) and IEEE SPS (Signal Processing Society)

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SiPS 2022 website: http://sips2022.insa-rennes.fr

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The IEEE Workshop on Signal Processing Systems (SiPS) is a premier international forum in the

area of design and implementation of signal processing systems. It addresses all aspects of

architecture and design methods of these systems. Emphasis is on current and future

challenges in research and development in both academia and industry.

IEEE SiPS 2022 is the 36th edition of this annual conference supported by

IEEE CAS (Circuit and Systems Society) and IEEE SPS (Signal Processing Society).

The program for the 2022 edition includes a demo night session of demonstrations and posters,

as well as two special sessions on system cybersecurity and signal processing systems

for space and astronomy applications.

The social event is organized at Mont Saint Michel, a site inscribed on the UNESCO list of

World Heritage Sites, and the theme of the year for the 2022 edition is sustainable systems.

Two submission formats are proposed: a “Journal Track” published directly in Springer

Journal of Signal Processing Systems (JSPS) and a “Conference Track” published in

IEEE Explore. The deadline for submission of manuscripts is April 15, 2022.

More information on http://sips2022.insa-rennes.fr.

TOPICS OF INTEREST

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We invite prospective authors to submit original papers either to the 6-page conference track

or to the 12-page journal track in areas including, but not limited to:

Theme of the Year: Towards Sustainable Systems

– Low energy systems

– Low environmental impact systems

Software Implementation of Signal Processing Systems

– Software on programmable digital signal processors

– Application-specific instruction-set processor (ASIP) architectures and systems

– SIMD, VLIW and multi-core CPU architectures

– GPU-based massively parallel implementations

Hardware Implementation of Signal Processing Systems

– Low-power signal processing circuits and applications

– High-performance VLSI systems

– FPGA and reconfigurable architecture-based systems

– System-on-chip and network-on-chip

– VLSI for sensor network and RF identification systems

– Processing-in-memory signal processing systems

Machine Learning for Signal Processing

– Circuits and systems for AI

– Deep learning/machine learning/AI algorithms

– Tools/platforms for AI

– Edge and cloud AI computing platforms

– Hardware/neuromorphic accelerators

– Hardware/software co-design and automation for AI

Design Methods of Signal Processing Systems

– Optimization of signal processing algorithms

– Compilers and tools for signal processing systems

– Algorithm-to-architecture transformation

– Dataflow-based design methodologies

– Error-tolerant techniques for signal processing

Signal Processing Application Systems

– Audio, speech, and language processing

– Biomedical signal processing and bioinformatics

– Image, video, and multimedia signal processing

– Information forensics, security, and cryptography

– Sensing and sensor signal processing

– Signal processing for non-volatile memory systems

– Latency-and power-constrained signal processing

– Wireless communications and MIMO systems

– Coding and compression

– Signal processing for mixed-signal technologies

IMPORTANT DATES

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Technical Papers: April 15, 2022

Special Session Proposals: April 15, 2022

COMMITTEE

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General Chairs

John McAllister, QUB

Maxime Pelcat, INSA Rennes, IETR

Program Chairs

Francesca Palumbo, UNISS

Daniel Menard, INSA Rennes, IETR

Publication Chair

Raquel Lazcano, UNISS

Communication Chairs

Herve Yviquel, UNICAMP

Xiaodong Yu, ANL

Finance Chair

Jean-Francois Nezan, INSA Rennes, IETR

Special Sessions Chair

Philippe Coussy, LabSTICC

Local Organization Chair

Karol Desnos, INSA Rennes, IETR

Asian Liaison: Gwo Giun Lee, NCKU

European Liaison: Eduardo Juarez Martinez, UPM

North American Liaison: Shuvra S. Bhattacharyya, UMD